1. Field of the Invention
The present invention relates to connecting devices to printed circuit boards. More particularly, the present invention relates to a layout of connecting pins for connecting integrated magnetics transceiver modules to a printed circuit board.
2. The Background
Computer networks using electrically conductive cables to connect a number of computers and associated network devices are common. Each device connected in such a network must transfer signals between the cable and the network device. Some network devices, such as hubs and switches, may typically have many cable connections making the efficient transfer of signals to and from these cables a critical task for the device.
Transceivers are devices that may be used to transfer signals between the cable and the network device. Transceivers typically contain one or more transmit and receive ports, each with a separate magnetic transformer for processing the signals for that port. The present invention relates to the parts of the transceiver containing the magnetic transformers, which are referred to as "magnetics" in the industry. As used in this disclosure, the term "magnetics" will refer to the magnetic transformers and they will be distinguished from the rest of the transceiver components. The magnetics may transfer data to and from the transceiver by this definition. It is assumed that the components of the transceiver, other than the magnetics, are located on a printed circuit board (PCB). Thus, a transfer of data to a PCB is synonymous with the transfer of data to a transceiver. Although this arrangement of the transceiver on a PCB is widely used, the present invention is not intended to be limited to any particular arrangement of the other transceiver components.
As is known by those of ordinary skill in the art, transformer operations are based upon the principal of inductance, and may generate unwanted electromagnetic fields and electromagnetic interference (EMI), adversely effecting other nearby electrical signals. The reverse is also true: nearby electrical signals may affect the magnetics and cause EMI which may in turn pass unwanted frequencies to the output of the magnetics. The reduction of EMI output is often a technically difficult, although important task. Problems arising from excessive EMI may include dropped network data packets, slower system performance and intermittent device failures. In extreme cases, high EMI may violate Federal Communication Commission regulations and/or prevent devices from operating.
In the past, magnetics were often located on the surface of a PCB, with signals between the transceiver and the cable routed to the magnetics for processing. This design allows the magnetics to be easily connected to other devices on the PCB, however, the location of the magnetics near these other devices may lead to EMI problems. A recent development in the industry has been the use of integrated magnetics modules (IMMs) in which the magnetics are located at the cable connectors and thus off of the actual surface of the PCB, often within a separate electrically shielded chassis to minimize the adverse EMI effects.
The present invention is directed to the connecting of one or more IMMs to the PCB. Unlike the case where the magnetics are located on the surface of the PCB, devices using IMMs do not need to route the signal of each conductor within a cable to the PCB for processing. Instead, only the signals to and from the IMMs, which are not the same as the signals carried by the cable, need to be routed between the PCB and the IMMs.
The connection pins are used to transfer signals between the PCB and conductive signal carrying media such as cables. Such cables are used in computer networks to couple signals to various devices on the network. The connection pin layout defines the geometry of the connection pins. That is, the connection pin layout defines which pin is next to which other pin and how the connection pins are grouped and oriented with respect to the PCB. This layout can be thought of as the "footprint" of the connection pins as they appear on the PCB, or equivalently the footprint of the connections on an IMM that connects to these pins. The connection pin layout of the present invention locates the connection pins, and routes the traces to the pins, in such a way as to minimize EMI effects on the signals transferred through the pins.
Traditionally, cables are connected to "plugs" such as, but not limited to, eight pin RJ-45 connectors as specified by the Electronic Industry Association (EIA)/Telecommunications Industry Association (TIA) and widely used in computer networks. The plugs are then connected to a circuit board with a number of conductors, corresponding to the individual cable conductors. The processing of data signals to and from the cables is done on the PCB "downstream" from these conductors. That is, magnetics used to process the signals to and from the cables were, in the past, separated from the plugs by the conductors.
Referring to FIG. 1, a cable 2 with an attached plug 4 that mates with socket 6 is shown. The cable signals are carried by conductors 8 to connection pins 10 on PCB 12. The processing of the signals is done downstream of connection pins 10 by magnetics package 14 on PCB 12. When more than one cable 2 is connected to PCB 12, such as may be found in a network switch connected to a number of network devices, multiple sets of conductors 8 may be used, with one set for each cable plug 4. The one-to-one correspondence between the cable conductors 8 and the signals routed to the circuit is often carried over to the design of the connection pin layout. For example, signals from a single eight-conductor cable 2 with an eight pin RJ-45 plug may be transferred to PCB 12 using eight individual conductors 8, and with a connection pin layout in an orientation corresponding to that of the RJ-45 plug. Connections to PCB 12 from multiple cables 2 may use multiple sets of conductors 8, with each set of conductors 8 having a connection pin layout corresponding to the cable plug 4 attached to the cable 2. For example, a network connected to four cables 2, each with eight conductors 8 and an RJ-45 plug, would typically route four sets of eight conductors 8 to PCB 12 with four separate sets of eight connection pins 10, each set having a connection pin layout corresponding to an RJ-45 plug.
Many cable networks, however, do not use eight-conductor cables 2. For example, the Ethernet 10Base-T protocol, which is widely used in computer networks, uses only four conductors, although in many cases the cables 2 connecting the devices in such a network may contain eight conductors. The present invention is not intended to be limited in this respect.
A recent development in the art is the use of IMMs, in which magnetics are integrated into the plugs used to connect the cables 2. Such IMMs may be electrically shielded from PCB 12 with a small surrounding metal chassis. It is the signals to and from the IMMs, rather than the signals carried by the individual cable conductors, that are then transferred to and from PCB 12.
Known prior art IMM to PCB connection pin layouts attempt to mimic the number and layout of cable to IMM connections. No known prior art system modifies the IMM to PCB connection pin layout or focuses on the nature of the signals that are passed through those connections to arrive at an optimal location of the connections for those signals on the PCB. No known prior art system uses the existence of two or more cable connections to coordinate the location of connection pins for a more optimal (in terms of EMI reduction or containment) connection pin layout on the PCB.
It would be desirable to provide a connection pin layout for connecting IMMs to a PCB that provides optimal location of the signals on the PCB for reduced EMI. Furthermore, it would be desirable to provide a connection pin layout that coordinates the location of signal connections from a plurality of devices.